// Copyright (C) 1953-2022 NUDT
// Verilog module name - ethernet_packet_lookup
// Version: V4.0.0.20220524
// Created:
//         by - fenglin 
////////////////////////////////////////////////////////////////////////////
// Description:
//         packet maps.
///////////////////////////////////////////////////////////////////////////


module ethernet_packet_lookup
(
        i_clk                           ,   
        i_rst_n                         ,
        
        iv_md                           ,
		i_md_wr                         ,	
        
        iv_dmacram_addr                 ,
        iv_dmacram_wdata                ,
        i_dmacram_wr                    ,
        ov_dmacram_rdata                ,
        i_dmacram_rd                    ,
        
        o_tsmp_lookup_table_key_wr      , 
        ov_tsmp_lookup_table_key        ,      
        iv_tsmp_lookup_table_outport    , 
        i_tsmp_lookup_table_outport_wr  ,
        
        ov_md                           ,          
        o_md_wr                         ,
        
        iv_broadcast_storm_prevent_outport       ,

        i_hit_cnt_clr                   ,
         
        ov_entry0_hit_cnt               ,
        ov_entry1_hit_cnt               ,
        ov_entry2_hit_cnt               ,
        ov_entry3_hit_cnt               ,
        ov_entry4_hit_cnt               ,
        ov_entry5_hit_cnt               ,
        ov_entry6_hit_cnt               ,
        ov_entry7_hit_cnt               , 
        ov_entry8_hit_cnt ,
        ov_entry9_hit_cnt ,
        ov_entry10_hit_cnt,
        ov_entry11_hit_cnt,
        ov_entry12_hit_cnt,
        ov_entry13_hit_cnt,
        ov_entry14_hit_cnt,
        ov_entry15_hit_cnt,
        ov_entry16_hit_cnt,
        ov_entry17_hit_cnt,
        ov_entry18_hit_cnt,
        ov_entry19_hit_cnt,
        ov_entry20_hit_cnt,
        ov_entry21_hit_cnt,
        ov_entry22_hit_cnt,
        ov_entry23_hit_cnt,
        ov_entry24_hit_cnt,
        ov_entry25_hit_cnt,
        ov_entry26_hit_cnt,
        ov_entry27_hit_cnt,
        ov_entry28_hit_cnt,
        ov_entry29_hit_cnt,
        ov_entry30_hit_cnt,
        ov_entry31_hit_cnt,
        ov_entry32_hit_cnt,
        ov_entry33_hit_cnt,
        ov_entry34_hit_cnt,
        ov_entry35_hit_cnt,
        ov_entry36_hit_cnt,
        ov_entry37_hit_cnt,
        ov_entry38_hit_cnt,
        ov_entry39_hit_cnt,
        ov_entry40_hit_cnt,
        ov_entry41_hit_cnt,
        ov_entry42_hit_cnt,
        ov_entry43_hit_cnt,
        ov_entry44_hit_cnt,
        ov_entry45_hit_cnt,
        ov_entry46_hit_cnt,
        ov_entry47_hit_cnt,
        ov_entry48_hit_cnt,
        ov_entry49_hit_cnt,
        ov_entry50_hit_cnt,
        ov_entry51_hit_cnt,
        ov_entry52_hit_cnt,
        ov_entry53_hit_cnt,
        ov_entry54_hit_cnt,
        ov_entry55_hit_cnt,
        ov_entry56_hit_cnt,
        ov_entry57_hit_cnt,
        ov_entry58_hit_cnt,
        ov_entry59_hit_cnt,
        ov_entry60_hit_cnt,
        ov_entry61_hit_cnt,
        ov_entry62_hit_cnt,
        ov_entry63_hit_cnt
);
// I/O
// clk & rst  
input               i_clk  ;
input               i_rst_n;
//5tuple & dmac input
input      [299:0]  iv_md  ;
input               i_md_wr;

input      [5:0]    iv_dmacram_addr     ;
input      [81:0]   iv_dmacram_wdata    ;
input               i_dmacram_wr        ;
output     [81:0]   ov_dmacram_rdata    ;
input               i_dmacram_rd        ;

output              o_tsmp_lookup_table_key_wr    ;
output     [47:0]   ov_tsmp_lookup_table_key      ;
input      [32:0]   iv_tsmp_lookup_table_outport  ;
input               i_tsmp_lookup_table_outport_wr;
//tsntag & bufid output 
output     [299:0]  ov_md  ;
output              o_md_wr;

input      [32:0]   iv_broadcast_storm_prevent_outport;
input               i_hit_cnt_clr    ;
                    
output     [15:0]   ov_entry0_hit_cnt;
output     [15:0]   ov_entry1_hit_cnt;
output     [15:0]   ov_entry2_hit_cnt;
output     [15:0]   ov_entry3_hit_cnt;
output     [15:0]   ov_entry4_hit_cnt;
output     [15:0]   ov_entry5_hit_cnt;
output     [15:0]   ov_entry6_hit_cnt;
output     [15:0]   ov_entry7_hit_cnt;
output     [15:0]  ov_entry8_hit_cnt ;
output     [15:0]  ov_entry9_hit_cnt ;
output     [15:0]  ov_entry10_hit_cnt;
output     [15:0]  ov_entry11_hit_cnt;
output     [15:0]  ov_entry12_hit_cnt;
output     [15:0]  ov_entry13_hit_cnt;
output     [15:0]  ov_entry14_hit_cnt;
output     [15:0]  ov_entry15_hit_cnt;
output     [15:0]  ov_entry16_hit_cnt;
output     [15:0]  ov_entry17_hit_cnt;
output     [15:0]  ov_entry18_hit_cnt;
output     [15:0]  ov_entry19_hit_cnt;
output     [15:0]  ov_entry20_hit_cnt;
output     [15:0]  ov_entry21_hit_cnt;
output     [15:0]  ov_entry22_hit_cnt;
output     [15:0]  ov_entry23_hit_cnt;
output     [15:0]  ov_entry24_hit_cnt;
output     [15:0]  ov_entry25_hit_cnt;
output     [15:0]  ov_entry26_hit_cnt;
output     [15:0]  ov_entry27_hit_cnt;
output     [15:0]  ov_entry28_hit_cnt;
output     [15:0]  ov_entry29_hit_cnt;
output     [15:0]  ov_entry30_hit_cnt;
output     [15:0]  ov_entry31_hit_cnt;
output     [15:0]  ov_entry32_hit_cnt;
output     [15:0]  ov_entry33_hit_cnt;
output     [15:0]  ov_entry34_hit_cnt;
output     [15:0]  ov_entry35_hit_cnt;
output     [15:0]  ov_entry36_hit_cnt;
output     [15:0]  ov_entry37_hit_cnt;
output     [15:0]  ov_entry38_hit_cnt;
output     [15:0]  ov_entry39_hit_cnt;
output     [15:0]  ov_entry40_hit_cnt;
output     [15:0]  ov_entry41_hit_cnt;
output     [15:0]  ov_entry42_hit_cnt;
output     [15:0]  ov_entry43_hit_cnt;
output     [15:0]  ov_entry44_hit_cnt;
output     [15:0]  ov_entry45_hit_cnt;
output     [15:0]  ov_entry46_hit_cnt;
output     [15:0]  ov_entry47_hit_cnt;
output     [15:0]  ov_entry48_hit_cnt;
output     [15:0]  ov_entry49_hit_cnt;
output     [15:0]  ov_entry50_hit_cnt;
output     [15:0]  ov_entry51_hit_cnt;
output     [15:0]  ov_entry52_hit_cnt;
output     [15:0]  ov_entry53_hit_cnt;
output     [15:0]  ov_entry54_hit_cnt;
output     [15:0]  ov_entry55_hit_cnt;
output     [15:0]  ov_entry56_hit_cnt;
output     [15:0]  ov_entry57_hit_cnt;
output     [15:0]  ov_entry58_hit_cnt;
output     [15:0]  ov_entry59_hit_cnt;
output     [15:0]  ov_entry60_hit_cnt;
output     [15:0]  ov_entry61_hit_cnt;
output     [15:0]  ov_entry62_hit_cnt;
output     [15:0]  ov_entry63_hit_cnt;
//***************************************************
//          extract five tuple from pkt 
//***************************************************
// internal reg&wire for state machine
wire                w_mapfifo_empty_fifo2tlu ;
wire                w_mapfifo_rd_tlu2fifo    ;
wire   [299:0]      wv_mapfifo_rdata_fifo2tlu; 

wire   [5:0]        wv_ram_raddr_b_tlu2ram;
wire                w_ram_rd_b_tlu2ram    ;
wire   [81:0]       wv_ram_rdata_b_ram2tlu;
//`ifdef altera_ip
syncfifo_showahead_sclr_w300d32 syncfifo_showahead_sclr_w300d32_epl_inst(
.sclr(!i_rst_n),                   //Reset the all signal
.data(iv_md),    //The Inport of data 
.rdreq(w_mapfifo_rd_tlu2fifo),       //active-high
.clock(i_clk),                       //ASYNC WriteClk(), SYNC use wrclk
.wrreq(i_md_wr),       //active-high
.q(wv_mapfifo_rdata_fifo2tlu),       //The output of data
.full(),              //Write domain full 
.empty(w_mapfifo_empty_fifo2tlu),                        //Write domain empty
.usedw()                         //Read-usedword
);

tdpr_singleclock_rdenab_outputaclrab_w82d64 tdpr_singleclock_rdenab_outputaclrab_w82d64_inst(
.aclr                          (!i_rst_n),
                              
.address_a                     (iv_dmacram_addr),
.address_b                     (wv_ram_raddr_b_tlu2ram),
                             
.clock                         (i_clk),
                             
.data_a                        (iv_dmacram_wdata),
.data_b                        (82'h0),
                              
.rden_a                        (i_dmacram_rd),
.rden_b                        (w_ram_rd_b_tlu2ram),
                             
.wren_a                        (i_dmacram_wr),
.wren_b                        (1'b0),
                              
.q_a                           (ov_dmacram_rdata),
.q_b                           (wv_ram_rdata_b_ram2tlu)
);
//`endif
`ifdef xilinx_ip
syncfifo_showahead_sclr_w300d32 syncfifo_showahead_sclr_w300d32_epl_inst(
.srst      (!i_rst_n),                    //Reset the all signal
.din       (iv_md),                       //The Inport of data 
.rd_en     (w_mapfifo_rd_tlu2fifo),       //active-high
.clk       (i_clk),                       //ASYNC WriteClk(), SYNC use wrclk
.wr_en     (i_md_wr),                     //active-high
.dout      (wv_mapfifo_rdata_fifo2tlu),   //The output of data
.full      (),                            //Write domain full 
.empty     (w_mapfifo_empty_fifo2tlu),    //Write domain empty
.data_count()                            //Read-usedword
);

truedualportram_singleclock_rdenab_outputaclrab_w82d64 truedualportram_singleclock_rdenab_outputaclrab_w82d64_inst(
.rsta                         (!i_rst_n),
.rstb                         (!i_rst_n),
.regcea                       (1'b1),
.regceb                       (1'b1),
     
.addra                        (iv_dmacram_addr),
.addrb                        (wv_ram_raddr_b_tlu2ram),
.clka                         (i_clk),
.clkb                         (i_clk),     
.dina                         (iv_dmacram_wdata),
.dinb                         (82'h0),                             
.ena                          (1'b1),
.enb                          (1'b1),                            
.wea                          (i_dmacram_wr),
.web                          (1'b0),                        
.douta                        (ov_dmacram_rdata),
.doutb                        (wv_ram_rdata_b_ram2tlu)
);
`endif

dmac_lookup dmac_lookup_inst(
.i_clk                           (i_clk                            ),
.i_rst_n                         (i_rst_n                          ),
                                 
.i_fifo_empty                    (w_mapfifo_empty_fifo2tlu         ),
.o_fifo_rd                       (w_mapfifo_rd_tlu2fifo            ),
.iv_fifo_rdata                   (wv_mapfifo_rdata_fifo2tlu        ),

.o_tsmp_lookup_table_key_wr      (o_tsmp_lookup_table_key_wr       ),
.ov_tsmp_lookup_table_key        (ov_tsmp_lookup_table_key         ),
.iv_tsmp_lookup_table_outport    (iv_tsmp_lookup_table_outport     ),
.i_tsmp_lookup_table_outport_wr  (i_tsmp_lookup_table_outport_wr   ),

.o_dmacram_rd                    (w_ram_rd_b_tlu2ram               ),
.ov_dmacram_raddr                (wv_ram_raddr_b_tlu2ram           ),
.iv_dmacram_rdata                (wv_ram_rdata_b_ram2tlu           ),
                                                                   
.ov_md                           (ov_md                            ),
.o_md_wr                         (o_md_wr                          ),

.iv_broadcast_storm_prevent_outport (iv_broadcast_storm_prevent_outport        ),
.i_hit_cnt_clr                   (i_hit_cnt_clr    ),         
.ov_entry0_hit_cnt               (ov_entry0_hit_cnt),
.ov_entry1_hit_cnt               (ov_entry1_hit_cnt),
.ov_entry2_hit_cnt               (ov_entry2_hit_cnt),
.ov_entry3_hit_cnt               (ov_entry3_hit_cnt),
.ov_entry4_hit_cnt               (ov_entry4_hit_cnt),
.ov_entry5_hit_cnt               (ov_entry5_hit_cnt),
.ov_entry6_hit_cnt               (ov_entry6_hit_cnt),
.ov_entry7_hit_cnt               (ov_entry7_hit_cnt),         
.ov_entry8_hit_cnt                (ov_entry8_hit_cnt ),
.ov_entry9_hit_cnt                (ov_entry9_hit_cnt ),
.ov_entry10_hit_cnt               (ov_entry10_hit_cnt),
.ov_entry11_hit_cnt               (ov_entry11_hit_cnt),
.ov_entry12_hit_cnt               (ov_entry12_hit_cnt),
.ov_entry13_hit_cnt               (ov_entry13_hit_cnt),
.ov_entry14_hit_cnt               (ov_entry14_hit_cnt),
.ov_entry15_hit_cnt               (ov_entry15_hit_cnt),         
.ov_entry16_hit_cnt               (ov_entry16_hit_cnt),
.ov_entry17_hit_cnt               (ov_entry17_hit_cnt),
.ov_entry18_hit_cnt               (ov_entry18_hit_cnt),
.ov_entry19_hit_cnt               (ov_entry19_hit_cnt),
.ov_entry20_hit_cnt               (ov_entry20_hit_cnt),
.ov_entry21_hit_cnt               (ov_entry21_hit_cnt),
.ov_entry22_hit_cnt               (ov_entry22_hit_cnt),
.ov_entry23_hit_cnt               (ov_entry23_hit_cnt),         
.ov_entry24_hit_cnt               (ov_entry24_hit_cnt),
.ov_entry25_hit_cnt               (ov_entry25_hit_cnt),
.ov_entry26_hit_cnt               (ov_entry26_hit_cnt),
.ov_entry27_hit_cnt               (ov_entry27_hit_cnt),
.ov_entry28_hit_cnt               (ov_entry28_hit_cnt),
.ov_entry29_hit_cnt               (ov_entry29_hit_cnt),
.ov_entry30_hit_cnt               (ov_entry30_hit_cnt),
.ov_entry31_hit_cnt               (ov_entry31_hit_cnt),         
.ov_entry32_hit_cnt               (ov_entry32_hit_cnt),
.ov_entry33_hit_cnt               (ov_entry33_hit_cnt),
.ov_entry34_hit_cnt               (ov_entry34_hit_cnt),
.ov_entry35_hit_cnt               (ov_entry35_hit_cnt),
.ov_entry36_hit_cnt               (ov_entry36_hit_cnt),
.ov_entry37_hit_cnt               (ov_entry37_hit_cnt),
.ov_entry38_hit_cnt               (ov_entry38_hit_cnt),
.ov_entry39_hit_cnt               (ov_entry39_hit_cnt),         
.ov_entry40_hit_cnt               (ov_entry40_hit_cnt),
.ov_entry41_hit_cnt               (ov_entry41_hit_cnt),
.ov_entry42_hit_cnt               (ov_entry42_hit_cnt),
.ov_entry43_hit_cnt               (ov_entry43_hit_cnt),
.ov_entry44_hit_cnt               (ov_entry44_hit_cnt),
.ov_entry45_hit_cnt               (ov_entry45_hit_cnt),
.ov_entry46_hit_cnt               (ov_entry46_hit_cnt),
.ov_entry47_hit_cnt               (ov_entry47_hit_cnt),         
.ov_entry48_hit_cnt               (ov_entry48_hit_cnt),
.ov_entry49_hit_cnt               (ov_entry49_hit_cnt),
.ov_entry50_hit_cnt               (ov_entry50_hit_cnt),
.ov_entry51_hit_cnt               (ov_entry51_hit_cnt),
.ov_entry52_hit_cnt               (ov_entry52_hit_cnt),
.ov_entry53_hit_cnt               (ov_entry53_hit_cnt),
.ov_entry54_hit_cnt               (ov_entry54_hit_cnt),
.ov_entry55_hit_cnt               (ov_entry55_hit_cnt),         
.ov_entry56_hit_cnt               (ov_entry56_hit_cnt),
.ov_entry57_hit_cnt               (ov_entry57_hit_cnt),
.ov_entry58_hit_cnt               (ov_entry58_hit_cnt),
.ov_entry59_hit_cnt               (ov_entry59_hit_cnt),
.ov_entry60_hit_cnt               (ov_entry60_hit_cnt),
.ov_entry61_hit_cnt               (ov_entry61_hit_cnt),
.ov_entry62_hit_cnt               (ov_entry62_hit_cnt),
.ov_entry63_hit_cnt               (ov_entry63_hit_cnt)
);
endmodule           